adcchip
    adc
        bias
        clkgen
            clkdrvbig
            inv_064
            inv_slow
            nand
            nand3i
        stage1
            adc15
                comp1
                tgate1
            clkdrv
            dac15_1
                inv_064
                nor_064
                nor3_064
                tgate1
            nor_064
            sh1
                amp2st1
                    core2st1
                    tgatex
                tgate1
                tgatemin
        stage2
            adc15
                comp1
                tgatex
            clkdrv
            dac15_2
                inv_064
                nor_064
                nor3_064
                tgate2
            nor_064
            sh2
                amp2st2
                    core2st2
                    tgatex
                tgate2
                tgatemin
        stagex
            adc15
                comp1
                tgatex
            clkdrv
            dac15_x
                inv_064
                nor_064
                nor3_064
                tgatex
            nor_064
            shx
                amp2stx
                    core2stx
                    tgatex
                tgatex
                tgatemin
        stage9
            adc15
                comp1
                tgatex
            clkdrv
            nor_064
        ddelay
            adder
                nand
                nand3i
                xor3i
                    inv_064
            clkdrv
            inv_064
            invtrs
            nand
            xor
                inv_064
    clkinput
    pindrv