------------------ LaRVaVideo microcontroller example design ------------------

                               J. Arias (2025)

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LaRVaVideo is a microcontroller that fits in the Alhambra-II board with the 
following features:

- RISC-V core, LaRVa2.
  - Pipelined 2-stage core.
  - Support for hardware multiplication and division (RV32EM)
  - 25.125 MHz (25 MIPS peak)
  - Configurable reset address.
  
- 15KB of RAM.

- SPI Flash (4MB) mapped into the address space thanks to a cached SPI flash
  controller (1KB cache)

- VGA video controller with 8 different modes:

	  0: Graphics, 640 x 480, 1 bit/pixel (not enough RAM)
	  1: Graphics, 640 x 240, 1 bit/pixel (not enough RAM)
	  2: Graphics, 320 x 480, 1 bit/pixel (not enough RAM)
	  3: Graphics, 320 x 240, 1 bit/pixel (9600 bytes)
	  4: Text, 80 x 60
	  5: Text, 80 x 30
	  6: Text, 40 x 60
	  7: Text, 40 x 30
  
  - 8 x 8 pixel character generator ROM with 128 ASCII codes and inverted video.
  - 6-bit color DAC. Foreground and background colors selectable.
  - Programable video base address.
  - Horizontal and Vertical retrace interrupts.

- PWM audio output. Synchronous with the horizontal video. 640 different levels
  (9.32 bits)

- I2C ADC. Two options:
	  - Selectable single input, with 8 bits and 18KS/s
	  - Parallel 4 inputs, with 12 bits and 1.3KS/s
  - Sample interrupt

- 32-bit free running timer with time matching interrupt.

- Debugging support:
  - Single-step interrupt.
  - Break (ctrl-c) interrupt.
  - Screen dirty flag.
  - Two hardware breakpoints.